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Disambiguation of "Huertas, José Luis"

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(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems.

, , , and . DELTA, page 8-13. IEEE Computer Society, (2010)

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José Luis Morote

José Luis Rivarola

José Luis Narro

Luis José Garcés

José Luis Goity

 

Other publications of authors with the same name

Low-Voltage CMOS subthreshold log-domain filtering., and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (10): 2090-2100 (2005)Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 51-I (1): 140-150 (2004)Improving the testability of switched-capacitor filters., , and . J. Electron. Test., 4 (4): 299-313 (1993)Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST., , , , , , and . J. Electron. Test., 21 (3): 221-232 (2005)A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs., , , and . ED&TC, page 389-394. IEEE Computer Society, (1997)COPAS: A New Algorithm for the Partial Input Encoding Problem., , , and . VLSI Design, 14 (2): 171-181 (2002)A new strategy for testing analog filters., , and . VTS, page 36-41. IEEE Computer Society, (1994)A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch., , , , , and . ISCAS, page 2019-2022. IEEE, (1993)A Model for VLSI Implementation of CNN Image Processing Chips Using Current-mode Techniques., , , , and . ISCAS, page 970-973. IEEE, (1993)SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems., , , , and . DAC, page 281-286. ACM Press, (1997)