( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Enhanced Heterogeneous Code Cache management scheme for Dynamic Binary Translation.

, , и . ASP-DAC, стр. 231-236. IEEE, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Chun Liu

Cheng Liu

Liu Cheng

Cheng-Chun Lu

Chun Hung Cheng

 

Другие публикации лиц с тем же именем

28.1 A 0.46mW 5MHz-BW 79.7dB-SNDR noise-shaping SAR ADC with dynamic-amplifier-based FIR-IIR filter., и . ISSCC, стр. 466-467. IEEE, (2017)Optimal Sensor Placement for Stay Cable Damage Identification of Cable-Stayed Bridge under Uncertainty., , , и . IJDSN, (2013)A 1-µW 10-bit 200-kS/s SAR ADC With a Bypass Window for Biomedical Applications., , , и . IEEE J. Solid State Circuits, 47 (11): 2783-2795 (2012)Enhanced Functional Pathway Annotations for Differentially Expressed Gene Clusters., , , , и . ISBRA, том 12304 из Lecture Notes in Computer Science, стр. 352-363. Springer, (2020)A 10-bit 320-MS/s low-cost SAR ADC for IEEE 802.11ac applications in 20-nm CMOS.. A-SSCC, стр. 77-80. IEEE, (2014)A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS., , , , и . A-SSCC, стр. 69-72. IEEE, (2011)6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology., , , , , , , , , и 8 other автор(ы). ISSCC, стр. 118-120. IEEE, (2020)A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation., , , , , , , и . ISSCC, стр. 386-387. IEEE, (2010)A 5b 800MS/s 2mW asynchronous binary-search ADC in 65nm CMOS., , , , и . ISSCC, стр. 80-81. IEEE, (2009)27.4 A 0.35mW 12b 100MS/s SAR-assisted digital slope ADC in 28nm CMOS.. ISSCC, стр. 462-463. IEEE, (2016)