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Disambiguation of "Wang, Chua-Chin"

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A pipeline ROM-less DDFS using equal-division interpolation.

, , and . ISOCC, page 19-20. IEEE, (2017)

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Wang- Chin Kim

Chin-hsien Wang

Stephanie Chua

Siewteen Chua

Modesto Chua

 

Other publications of authors with the same name

A Low-power 4-T SAM Design for OFDM Demodulators in DVB Receiversers., , , , , and . APCCAS, page 1112-1115. IEEE, (2006)A high-speed 2×VDD output buffer with PVT detection using 40-nm CMOS technology., , and . ISCAS, page 2079-2082. IEEE, (2013)A Li-ion battery charging design for biomedical implants., , and . APCCAS, page 400-403. IEEE, (2008)A ROM-less DDFS using a nonlinear DAC with an error compensation current array., , , and . APCCAS, page 1632-1635. IEEE, (2008)An 80MHz PLL with 72.7ps peak-to-peak jitter., , , and . Microelectron. J., 38 (6-7): 716-721 (2007)Wide-range CTAT and PTAT sensors with second-order calibration for on-chip thermal monitoring., , and . Microelectron. J., 46 (9): 819-824 (2015)Low-Power Multiplier Design Using a Bypassing Technique., and . J. Signal Process. Syst., 57 (3): 331-338 (2009)A Signed Array Multiplier with Bypassing Logic., , , and . J. Signal Process. Syst., 66 (2): 87-92 (2012)A ROM-less DDFS Based on a Parabolic Polynomial Interpolation Method with an Offset., , , and . J. Signal Process. Syst., 64 (3): 351-359 (2011)A 800 Mbps and 12.37 ps Jitter Bidirectional Mixed-Voltage I/O Buffer With Dual-Path Gate-Tracking Circuit., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (1): 116-124 (2013)