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Disambiguation of "de Carvalho, Joao P. L."

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On the impact of mode transition on phased transactional memory performance.

, , , , and . J. Parallel Distributed Comput., (March 2023)

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Maria João Almeida Carvalho

P L Kinney

Luiz Cláudio ˜deœ Carvalho

Irene Melo de Carvalho

Crícia de Carvalho Rodegheri

 

Other publications of authors with the same name

YaConv: Convolution with Low Cache Footprint., , , and . ACM Trans. Archit. Code Optim., 20 (1): 18:1-18:18 (March 2023)Using Barrier Elision to Improve Transactional Code Generation., , , , and . ACM Trans. Archit. Code Optim., 19 (3): 46:1-46:23 (2022)KernelFaRer: Replacing Native-Code Idioms with High-Performance Library Calls., , , , , , and . ACM Trans. Archit. Code Optim., 18 (3): 38:1-38:22 (2021)Vectorizing divergent control flow with active-lane consolidation on long-vector architectures., , , , and . J. Supercomput., 78 (10): 12553-12588 (2022)Accelerating Graph Applications Using Phased Transactional Memory., , , , , and . Euro-Par, volume 12820 of Lecture Notes in Computer Science, page 421-434. Springer, (2021)Improving Transactional Code Generation via Variable Annotation and Barrier Elision., , , and . IPDPS, page 1008-1017. IEEE, (2020)Advancing Direct Convolution using Convolution Slicing Optimization and ISA Extensions., , , , , , and . CoRR, (2023)Compiling for the IBM Matrix Engine for Enterprise Workloads., , and . IEEE Micro, 42 (5): 34-40 (2022)Fast matrix multiplication via compiler-only layered data reorganization and intrinsic lowering., , , , , , and . Softw. Pract. Exp., 53 (9): 1793-1814 (September 2023)Pooling Acceleration in the DaVinci Architecture Using Im2col and Col2im Instructions., , , , , and . IPDPS Workshops, page 46-55. IEEE, (2021)