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Disambiguation of "Mohamed, Otmane Aït"

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A novel hybrid FIFO asynchronous clock domain crossing interfacing method.

, , , and . ACM Great Lakes Symposium on VLSI, page 271-274. ACM, (2012)

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Mohamed Ait Hamza

Mohamed Ait-Salem

Mohamed Ait elFerrane

Ali Aït-Bachir

Idir Aït-Sadoune

 

Other publications of authors with the same name

Optimum domain partitioning to increase functional verification coverage., and . ISQED, page 419-423. IEEE, (2015)Abstracting Single Event Transient characteristics variations due to input patterns and fan-out., , , and . ISCAS, page 1468-1471. IEEE, (2014)Multipath Routing of Mixed-Critical Traffic in Time Sensitive Networks., , and . IEA/AIE, volume 11606 of Lecture Notes in Computer Science, page 504-515. Springer, (2019)On the non-termination of MDGs-based abstract state enumeration., , and . CHARME, volume 105 of IFIP Conference Proceedings, page 218-235. Chapman & Hall, (1997)Applying formal verification to early assessment of FPGA-based aerospace applications: Methodology and experience., , and . SysCon, page 1-6. IEEE, (2016)An Abstract Reachability Approach by Combining HOL Induction and Multiway Decision Graphs., , and . J. Comput. Sci. Technol., 24 (1): 76-95 (2009)Towards Safe and Robust Closed-Loop Artificial Pancreas Using Improved PID-Based Control Strategies., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (8): 3147-3157 (2021)Automatic mapping of AF3 specifications to ARM cortex-M based FRDM platfrom., , and . ICM, page 232-235. IEEE, (2014)Layout-based reliability analysis of openMSP430 register file under external radiations., , and . ICM, page 294-297. IEEE, (2023)Automatic verification of reduction techniques in Higher Order Logic., , and . Formal Aspects Comput., 25 (6): 971-991 (2013)