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A 88%-Peak-Efficiency 10-mV-Voltage-Ripple Dual-Mode Switched-Capacitor DC-DC Converter for Ultra-Low-Power Battery Management.

, , , , , , , and . ISCAS, page 1-5. IEEE, (2023)

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A hardware-friendly method for rate-distortion optimization of HEVC intra coding., , , , and . VLSI-DAT, page 1-4. IEEE, (2014)A Parallel-Access Mapping Method for the Data Exchange Buffers Around DCT/IDCT in HEVC Encoders Based on Single-Port SRAMs., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (12): 1139-1143 (2015)A 88%-Peak-Efficiency 10-mV-Voltage-Ripple Dual-Mode Switched-Capacitor DC-DC Converter for Ultra-Low-Power Battery Management., , , , , , , and . ISCAS, page 1-5. IEEE, (2023)A Micro-Code-Based Hardware Architecture of Integer Motion Estimation for HEVC., , , and . VLSI-SoC, page 269-274. IEEE, (2019)A Micro-Code-Based IME Engine for HEVC and Its Hardware Implementation., , , and . IEICE Trans. Electron., 102-C (10): 756-765 (2019)A flexible HEVC intra mode decision hardware for 8kx4k real time encoder., , , , and . ASICON, page 1-4. IEEE, (2015)A Real-Time Respiration Monitoring System Using WiFi Sensing Based on the Concentric Circle Model., , , , , , , , and . IEEE Trans. Biomed. Circuits Syst., 17 (2): 157-168 (April 2023)A Combined Deblocking Filter and SAO Hardware Architecture for HEVC., , , , , , and . IEEE Trans. Multim., 18 (6): 1022-1033 (2016)A SRAM-saving two-stage storage strategy for the coefficients memories in HEVC encoders., , , and . ASICON, page 1-4. IEEE, (2015)A Hardware-Oriented IME Algorithm for HEVC and Its Hardware Implementation., , , and . IEEE Trans. Circuits Syst. Video Techn., 28 (8): 2048-2057 (2018)