( en | de | ru )

 

Disambiguation of "Suzuki, Hiroaki"

Author of the publication

copydeleteadd this publication to your clipboard
Fillmat is NP-Complete and ASP-Complete.

, and . J. Inf. Process., 23 (3): 310-316 (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Yoko Suzuki

Hiroaki Kobayashi

Hiroaki Tanaka

Shigenobu Suzuki

Seiichi Suzuki

 

Other publications of authors with the same name

A Fully Static Topologically-Compressed 21-Transistor Flip-Flop With 75% Power Saving., , , , , , , , and . IEEE J. Solid State Circuits, 49 (11): 2526-2533 (2014)Fast Tag Comparator Using Diode Partitioned Domino for 64-bit Microprocessors., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (2): 322-328 (2007)Autonomous Microfluidic Control by Chemically Actuated Micropumps and Its Application to Chemical Analyses, , and . Analytical Chemistry, 82 (16): 6870-6876 (2010)An 8.8-ns 54×54-bit multiplier with high speed redundant binary architecture., , , , , and . IEEE J. Solid State Circuits, 31 (6): 773-783 (1996)Novel VLIW code compaction method for a 3D geometry processor., , and . CICC, page 555-558. IEEE, (2000)Reagent Handling and Delivery System Using Cell-Sized Liposomes., , and . NEMS, page 181-184. IEEE, (2018)A programming environment for multi-FPGA systems based on CyberWorkBench: an integrated design tool., , , and . HEART, page 5:1-5:6. ACM, (2021)Low-power carry-select adder using adaptive supply voltage based on input vector patterns., , and . ISLPED, page 313-318. ACM, (2004)Comments on "Leading-zero anticipatory logic for high-speed floating point addition" with reply., , , , , , and . IEEE J. Solid State Circuits, 32 (2): 292 (1997)The Complexity of Generalized Pipe Link Puzzles., , and . J. Inf. Process., (2017)