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A Low-Latency and High-Throughput Multiple-Level Arbitration Scheme Supporting Quality-of-Service in Optical On-chip Network.

, , and . NoCArc@MICRO, page 9-14. ACM, (2015)

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A Low-Latency and High-Throughput Multiple-Level Arbitration Scheme Supporting Quality-of-Service in Optical On-chip Network., , and . NoCArc@MICRO, page 9-14. ACM, (2015)Optimal Implementation of In-Band Network Management for High-Radix Switches., , , , and . ACA, volume 1256 of Communications in Computer and Information Science, page 16-30. Springer, (2020)Design of Converged Network Coding Layer for the Ethernet and HPC High-Speed Network., , , and . HPCC/DSS/SmartCity, page 163-169. IEEE, (2020)A High-Radix Switch Architecture Based on Silicon Photonic and 3D Integration., , , and . NCCET, volume 666 of Communications in Computer and Information Science, page 179-190. Springer, (2016)PPS: A Low-Latency and Low-Complexity Switching Architecture Based on Packet Prefetch and Arbitration Prediction., , , , and . ICA3PP (1), volume 11944 of Lecture Notes in Computer Science, page 3-16. Springer, (2019)A 32 Gb/s Low Power Little Area Re-timer with PI Based CDR in 65 nm CMOS Technology., , , , , , , , and . ACA, volume 1256 of Communications in Computer and Information Science, page 31-42. Springer, (2020)Artificial Neural Network Based on Memristive Circuit for High-Speed Equalization., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (4): 1745-1756 (April 2024)A Metastability Inference and Avoidance Technique for Near-Threshold-Voltage Network-on-Chip., , , , and . ISCAS, page 1-5. IEEE, (2023)A CNRZ-7 Based Wireline Transceiver With High-Bandwidth-Density, Low-Power for D2D Communication., , , , , , , , and . IEEE Access, (2022)Frequency Domain Modeling and Performance Analysis of Injection-Locked LC Oscillator., , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 71 (1): 11-15 (January 2024)