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iFPNA: A Flexible and Efficient Deep Learning Processor in 28-nm CMOS Using a Domain-Specific Instruction Set and Reconfigurable Fabric.

, , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (2): 346-357 (2019)

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Parametric Equivalent Circuit Extraction for VLSI Structures., , and . VLSI-SOC, page 198-203. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Reliability-Constrained Area Optimization of VLSI Power/Ground Networks via Sequence of Linear Programmings., , , , and . DAC, page 78-83. ACM Press, (1999)A signed hypergraph model of constrained via minimization.. Great Lakes Symposium on VLSI, page 159-166. IEEE, (1992)Code construction and FPGA implementation of a low-error-floor multi-rate low-density Parity-check code decoder., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 53-I (4): 892-904 (2006)Compact representation and efficient generation of s-expandedsymbolic network functions for computer-aided analog circuit design., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (7): 813-827 (2001)A Quasi-Newton Preconditioned Newton-Krylov Method for Robust and Efficient Time-Domain Simulation of Integrated Circuits With Strong Parasitic Couplings., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (12): 2868-2881 (2006)Efficient DC fault simulation of nonlinear analog circuits: one-step relaxation and adaptive simulation continuation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (7): 1392-1400 (2006)Timed-Elastic-Band Based Variable Splitting for Autonomous Trajectory Planning., , , , and . CoRR, (2024)A 13.56 MHz Active Rectifier With Self-Switching Comparator for Wireless Power Transfer Systems., , and . ISOCC, page 54-55. IEEE, (2018)Fast Power/Ground Network Optimization Based on Equivalent Circuit Modeling., and . DAC, page 550-554. ACM, (2001)