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Disambiguation of "Saluja, Kewal K."

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Diagnosis Methods for Gate Delay Faults with Various Amounts of Delays.

, , , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2016)

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Heinz Kewald

Kewal Krishen Mehta

Aman K K Bhasin

K Schweizerhof

K Böning

 

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Routing TCP Flows in Underwater Mesh Networks., , and . IEEE J. Sel. Areas Commun., 29 (10): 2022-2032 (2011)Fault Simulation and Test Generation for Transistor Shorts Using Stuck-at Test Tools., , , , and . IEICE Trans. Inf. Syst., 91-D (3): 690-699 (2008)Optimal Test Scheduling Formulation under Power Constraints with Dynamic Voltage and Frequency Scaling., and . J. Electron. Test., 30 (5): 569-580 (2014)An Algorithm for Diagnosing Transistor Shorts Using Gate-level Simulation., , , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2009)Theory, Analysis and Implementation of an On-Line BIST Technique., and . VLSI Design, 1 (1): 9-22 (1993)Critical-Path-Aware X-Filling for Effective IR-Drop Reduction in At-Speed Scan Testing., , , , , and . DAC, page 527-532. IEEE, (2007)An Algorithm to Test Rams for Physical Neighborhood Pattern Sensitive Faults., and . ITC, page 675-684. IEEE Computer Society, (1991)Easily Testable Two-Dimensional Cellular Logic Arrays., and . IEEE Trans. Computers, 23 (11): 1204-1207 (1974)Testing Computer Hardware through Data Compression in Space and Time., and . ITC, page 83-88. IEEE Computer Society, (1983)Instruction-based delay fault self-testing of pipelined processor cores., , , and . ISCAS (6), page 5686-5689. IEEE, (2005)