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A Novel Channel Assignment Method to Ensure Deadlock-Freedom for Deterministic Routing., , , , , , и . IEICE Trans. Inf. Syst., 100-D (8): 1798-1806 (2017)Geyser., , , , , и . Handbook of Energy-Aware and Green Computing, Chapman and Hall/CRC, (2012)The realtime image processing demonstration with CMA-1: An ultra low-power reconfigurable accelerator., , и . FPT, стр. 1-4. IEEE, (2011)Overwrite Configuration Technique in Multicast Configuration Scheme for Dynamically Reconfigurable Processor Arrays., , , , , , и . FPT, стр. 273-276. IEEE, (2007)A low power reconfigurable accelerator using a back-gate bias control technique., , , и . FPT, стр. 390-393. IEEE, (2013)A speculative gather system for Cool Mega-Array., , , , , и . FPT, стр. 346-349. IEEE, (2013)Variable pipeline structure for Coarse Grained Reconfigurable Array CMA., , , и . FPT, стр. 217-220. IEEE, (2016)A prototype chip of multicontext FPGA with DRAM for virtual hardware., , и . ASP-DAC, стр. 17-18. ACM, (2001)An LSI implementation of the simple serial synchronized multistage interconnection network., , и . ASP-DAC, стр. 673-674. IEEE, (1997)A System Delay Monitor Exploiting Automatic Cell-Based Design Flow and Post-Silicon Calibration., , и . MCSoC, стр. 32-37. IEEE, (2019)