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Timing analysis of asynchronous systems using time separation of events., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (8): 1061-1076 (1999)Refining abstract interpretations., , , and . Inf. Process. Lett., 110 (16): 666-671 (2010)Theory and Application of Nongroup Cellular Automata for Synthesis of Easily Testable Finite State Machines., , and . IEEE Trans. Computers, 45 (7): 769-781 (1996)Symbolic trajectory evaluation for word-level verification: theory and implementation., , , , , , and . Formal Methods Syst. Des., 50 (2-3): 317-352 (2017)Approximate Probabilistic Inference via Word-Level Counting., , , and . CoRR, (2015)Constrained Sampling and Counting: Universal Hashing Meets SAT Solving., , , , , , , and . CoRR, (2015)Projected Model Counting: Beyond Independent Support., , and . CoRR, (2021)Delay Fault Test Generation with Cellular Automata., , , , and . VLSI Design, page 281-286. IEEE Computer Society, (1993)Complexity Of Minimum-Delay Gate Resizing., and . VLSI Design, page 425-430. IEEE Computer Society, (2001)Cellular automata based synthesis of easily and fully testable FSMs., , , and . ICCAD, page 650-653. IEEE Computer Society / ACM, (1993)