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A Novel Memory Structure for Embedded Systems: Flexible Sequential and Random Access Memory.

, , , , and . J. Comput. Sci. Technol., 20 (5): 596-606 (2005)

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3D FPGAs: placement, routing, and architecture evaluation (abstract only)., , and . FPGA, page 263. ACM, (2005)Placement and Routing in 3D Integrated Circuits., , , , , , and . IEEE Des. Test Comput., 22 (6): 520-531 (2005)Timing-driven partitioning-based placement for island style FPGAs., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (3): 395-406 (2005)Parallel Unary Computing Based on Function Derivatives., , , and . ACM Trans. Reconfigurable Technol. Syst., 14 (1): 4:1-4:25 (2020)Statistical Analysis and Design of HARP FPGAs., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (10): 2088-2102 (2006)Hybrid binary-unary hardware accelerator., and . ASP-DAC, page 210-215. ACM, (2019)Timing Minimization by Statistical Timing hMetis-based Partitioning., and . VLSI Design, page 58-63. IEEE Computer Society, (2003)A reconfigurable stochastic architecture for highly reliable computing., , , , and . ACM Great Lakes Symposium on VLSI, page 315-320. ACM, (2009)A C to Hardware/Software Compiler., , , and . FCCM, page 331-332. IEEE Computer Society, (2000)Non-Contiguous Linear Placement for Reconfigurable Fabrics., and . IPDPS, IEEE Computer Society, (2004)