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Application Development Framework for the Rapid Integration of High Performance Image Processing Algorithms.

, , and . AIPR, page 32. IEEE Computer Society, (2006)

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A Dependable High Performance Wafer Scale Architecture for Embedded Signal Processing., , and . IEEE Trans. Computers, 47 (1): 125-128 (1998)A FrameWork for high-performance image exploitation., , and . OOPSLA Companion, page 42-43. ACM, (2002)Information management for high performance autonomous intelligent systems., , , and . PerMIS, page 237-241. ACM, (2007)GPGPU role within a 500 TFLOPS heterogeneous cluster.. GPGPU, volume 425 of ACM International Conference Proceeding Series, page 62. ACM, (2010)A columnar primary visual cortex (V1) model emulation using a PS3 Cell-BE array., , , and . IJCNN, page 1-8. IEEE, (2010)Using globus grid objects to extend a corba-based object-oriented system., , and . OOPSLA Companion, page 188-189. ACM, (2005)Limiting Optimism: Time or Event Count?, and . DS-RT, page 253-256. IEEE Computer Society, (2006)Parallel flux tensor analysis for efficient moving object detection., , , , , , and . FUSION, page 1-8. IEEE, (2011)Emerging neuromorphic computing architectures & enabling hardware for cognitive information processing applications., , , , and . CIP, page 35-39. IEEE, (2010)Digital signal processing capabilities of CUSP, a high performance bit-serial VLSI processor., , , and . ICASSP, page 660-663. IEEE, (1984)