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Disambiguation of "Yan, Bonan"

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A spiking neuromorphic design with resistive crossbar.

, , , , , , , , , and . DAC, page 14:1-14:6. ACM, (2015)

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Karin Bonan

Yan Yan

Marc Bonanni

Johannes Bonanati

Arno Bonanni

 

Other publications of authors with the same name

VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (10): 4028-4041 (2022)Memristive devices based hardware for unlabeled data processing., , , , and . Neuromorph. Comput. Eng., 2 (2): 22003 (2022)Probabilistic Compute-in-Memory Design For Efficient Markov Chain Monte Carlo Sampling., , , , , , and . CoRR, (2023)AttentionLego: An Open-Source Building Block For Spatially-Scalable Large Language Model Accelerator With Processing-In-Memory Technology., , , , , , , and . CoRR, (2024)Heterogeneous Memory Architecture Accommodating Processing-in-Memory on SoC for AIoT Applications., , , and . ASP-DAC, page 383-388. IEEE, (2022)Recent progresses of STT memory design and applications., , , , , and . ASICON, page 1-4. IEEE, (2015)Low-power neuromorphic speech recognition engine with coarse-grain sparsity., , , , , , and . ASP-DAC, page 111-114. IEEE, (2017)A neuromorphic design using chaotic mott memristor with relaxation oscillation., , and . DAC, page 167:1-167:6. ACM, (2018)Probabilistic Compute-in-Memory Design for Efficient Markov Chain Monte Carlo Sampling., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (2): 703-716 (February 2024)Hadamard product-based in-memory computing design for floating point neural network training., , , , , , , , , and . Neuromorph. Comput. Eng., 3 (1): 14009 (March 2023)