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Disambiguation of "Torii, Naoya"

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Side-channel attack on COSO-based TRNG to estimate output bits.

, , and . CANDARW, page 302-308. IEEE, (2022)

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Naoya Koseki

 

Other publications of authors with the same name

ASIC implementation of random number generators using SR latches and its evaluation., , , , , and . EURASIP J. Information Security, (2016)Fast Implementation of Public-Key Cryptography ona DSP TMS320C6201., , , , and . CHES, volume 1717 of Lecture Notes in Computer Science, page 61-72. Springer, (1999)A new method for enhancing variety and maintaining reliability of PUF responses and its evaluation on ASICs., , , , , , and . J. Cryptographic Engineering, 5 (3): 187-199 (2015)Design Optimization of a High-Speed, Area-Efficient and Low-Power Montgomery Modular Multiplier for RSA Algorithm., , , and . IEICE Trans. Electron., 88-C (4): 576-581 (2005)Side-channel attack on COSO-based TRNG to estimate output bits., , and . CANDARW, page 302-308. IEEE, (2022)The Block Cipher SC2000., , , , , , , and . FSE, volume 2355 of Lecture Notes in Computer Science, page 312-327. Springer, (2001)Security Evaluation of Bistable Ring PUFs on FPGAs using Differential and Linear Analysis., , , and . FedCSIS, volume 2 of Annals of Computer Science and Information Systems, page 911-918. (2014)Evaluation of ASIC Implementation of Physical Random Number Generators Using RS Latches., , , , and . CARDIS, volume 8419 of Lecture Notes in Computer Science, page 3-15. Springer, (2013)Experimental Evaluation on the Resistance of Latch PUFs Implemented on ASIC against FIB-Based Invasive Attacks., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 99-A (1): 118-129 (2016)Implementation and Evaluation of Ring Oscillator-based True Random Number Generator., , , and . Int. J. Netw. Comput., 12 (2): 372-386 (2022)