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On-chip jitter measurement for true random number generators.

, , , , and . AsianHOST, page 91-96. IEEE Computer Society, (2017)

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Three Phase Dynamic Current Mode Logic: A More Secure DyCML to Achieve a More Balanced Power Consumption., , and . WISA, volume 7690 of Lecture Notes in Computer Science, page 68-81. Springer, (2012)Highly efficient entropy extraction for true random number generators on FPGAs., , , and . DAC, page 116:1-116:6. ACM, (2015)Random numbers generation: Investigation of narrowtransitions suppression on FPGA., and . FPL, page 699-702. IEEE, (2009)TOTAL: TRNG on-the-fly testing for attack detection using Lightweight hardware., , , , and . DATE, page 127-132. IEEE, (2016)Design solutions for securing SRAM cell against power analysis., , and . HOST, page 122-127. IEEE Computer Society, (2012)On-the-fly tests for non-ideal true random number generators., , , and . ISCAS, page 2017-2020. IEEE, (2015)Evolving Cryptographic Pseudorandom Number Generators., , , , , and . PPSN, volume 9921 of Lecture Notes in Computer Science, page 613-622. Springer, (2016)Towards inter-vendor compatibility of true random number generators for FPGAs., , , and . DATE, page 1520-1523. IEEE, (2018)The Monte Carlo PUF., , , , and . FPL, page 1-6. IEEE, (2017)Challenges in designing trustworthy cryptographic co-processors., , , , , , , , , and 2 other author(s). ISCAS, page 2009-2012. IEEE, (2015)