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FMMU: a hardware-accelerated flash map management unit for scalable performance of flash-based SSDs., , and . DAC, page 115:1-115:6. ACM, (2018)A worst case timing analysis technique for instruction prefetch buffers., , and . Microprocess. Microprogramming, 40 (10-12): 681-684 (1994)Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis., , and . ISLPED, page 396-401. ACM, (2003)Performance Evaluation of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems., , , , and . J. Low Power Electron., 1 (3): 207-216 (2005)Copycat: A High Precision Real Time NAND Simulator., , , and . CoRR, (2016)Analysis of Worst Case DMA Response Time in a Fixed-Priority Bus Arbitration Protocol., , , and . Real Time Syst., 23 (3): 209-238 (2002)Threaded Prefetching: A New Instruction Memory Hierarchy for Real-Time Systems., , , , and . Real Time Syst., 13 (1): 47-65 (1997)Cache-Conscious Limited Preemptive Scheduling., , , , and . Real Time Syst., 17 (2-3): 257-282 (1999)An Accurate Worst Case Timing Analysis for RISC Processors., , , , , , , , , and . IEEE Trans. Software Eng., 21 (7): 593-604 (1995)A design framework for real-time embedded systems with code size and energy constraints., , , , and . ACM Trans. Embed. Comput. Syst., 7 (2): 18:1-18:27 (2008)