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Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits.

C. Chuang, Y. Lai, and J. Jiang. DAC, page 192:1-192:6. ACM, (2014)

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Hsiang Kuang

Waltraud Lai

Eugen Lai

Mao Lai

Xin Lai

Other publications of authors with the same name

Accelerator design with decoupled hardware customizations: benefits and challenges: invited.D. Pal, Y. Lai, S. Xiang, N. Zhang, H. Chen, J. Casas, P. Cocchini, Z. Yang, J. Yang, L. Pouchet and 1 other author(s). DAC, page 1351-1354. ACM, (2022)Scalable Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits.Y. Lai, C. Chuang, and J. Jiang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (11): 1797-1810 (2016)Bring Your Own Codegen to Deep Learning Compiler.Z. Chen, C. Yu, T. Morris, J. Tuyls, Y. Lai, J. Roesch, E. Delaye, V. Sharma, and Y. Wang. CoRR, (2021)Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits.C. Chuang, Y. Lai, and J. Jiang. DAC, page 192:1-192:6. ACM, (2014)Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits.N. Lee, H. Kuo, Y. Lai, and J. Jiang. ICCAD, page 5. ACM, (2016)HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing.Y. Lai, Y. Chi, Y. Hu, J. Wang, C. Yu, Y. Zhou, J. Cong, and Z. Zhang. FPGA, page 242-251. ACM, (2019)SPOCK: Static Performance Analysis and Deadlock Verification for Efficient Asynchronous Circuit Synthesis.C. Shih, Y. Lai, and J. Jiang. ICCAD, page 442-449. IEEE, (2015)Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects.Y. Lai, E. Ustun, S. Xiang, Z. Fang, H. Rong, and Z. Zhang. ACM Trans. Reconfigurable Technol. Syst., 14 (4): 17:1-17:39 (2021)HeteroFlow: An Accelerator Programming Model with Decoupled Data Placement for Software-Defined FPGAs.S. Xiang, Y. Lai, Y. Zhou, H. Chen, N. Zhang, D. Pal, and Z. Zhang. FPGA, page 78-88. ACM, (2022)SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs.Y. Lai, H. Rong, S. Zheng, W. Zhang, X. Cui, Y. Jia, J. Wang, B. Sullivan, Z. Zhang, Y. Liang and 6 other author(s). ICCAD, page 73:1-73:9. IEEE, (2020)

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Disambiguation of "Lai, Yi-Hsiang"

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Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits.

Please choose a person to relate this publication to

Hsiang Kuang

Waltraud Lai

Eugen Lai

Mao Lai

Xin Lai

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lai, Yi-Hsiang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits.

Please choose a person to relate this publication to

Hsiang Kuang

Waltraud Lai

Eugen Lai

Mao Lai

Xin Lai

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits.