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Disambiguation of "Shi, C.-J. Richard"

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OCEAN: An On-Chip Incremental-Learning Enhanced Artificial Neural Network Processor With Multiple Gated-Recurrent-Unit Accelerators.

, , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (3): 519-530 (2018)

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C J Schumacher

J C Kämmer

J. C. Whitaker

J C Schmidt

Richard C Domek

 

Other publications of authors with the same name

Parametric Equivalent Circuit Extraction for VLSI Structures., , and . VLSI-SOC, page 198-203. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)A signed hypergraph model of constrained via minimization.. Great Lakes Symposium on VLSI, page 159-166. IEEE, (1992)IPRAIL - intellectual property reuse-based analog IC layout automation., , , and . Integr., 36 (4): 237-262 (2003)Code construction and FPGA implementation of a low-error-floor multi-rate low-density Parity-check code decoder., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 53-I (4): 892-904 (2006)Reliability-Constrained Area Optimization of VLSI Power/Ground Networks via Sequence of Linear Programmings., , , , and . DAC, page 78-83. ACM Press, (1999)Template-driven parasitic-aware optimization of analog integrated circuit layouts., , and . DAC, page 644-647. ACM, (2005)Symbolic analysis of analog circuits with hard nonlinearity., , and . DAC, page 542-545. ACM, (2003)Fast Power/Ground Network Optimization Based on Equivalent Circuit Modeling., and . DAC, page 550-554. ACM, (2001)A 13.56 MHz Active Rectifier With Self-Switching Comparator for Wireless Power Transfer Systems., , and . ISOCC, page 54-55. IEEE, (2018)Efficient DC fault simulation of nonlinear analog circuits: one-step relaxation and adaptive simulation continuation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (7): 1392-1400 (2006)