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Disambiguation of "Burleson, Wayne P."

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Low voltage sensing techniques and secondary design issues for sub-90nm caches.

, , , , , and . ESSCIRC, page 413-416. IEEE, (2003)

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Wayne Coppins

Wayne Daley

Wayne Schmidt

Wayne Clements

Gary Wayne Anderson

 

Other publications of authors with the same name

Node merging: A transformation on bit-level dependence graphs for efficient VLSI array design., and . ASAP, page 442-453. IEEE, (1993)PLayPUF: Programmable Logically Erasable PUFs for Forward and Backward Secure Key Management., , , , and . IACR Cryptology ePrint Archive, (2015)Performance optimization of wireless local area networks through VLSI data compression., and . Wireless Networks, 4 (1): 27-39 (1998)Temperature measurement in Content Addressable Memory cells using bias-controlled VCO., and . SoCC, page 147-150. IEEE, (2008)Vlsi Array Architectures for Pyramid Vector Quantization., and . VLSI Signal Processing, 18 (2): 141-154 (1998)Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption., , and . FPGA, page 220. ACM, (2000)Modeling and Experimental Demonstration of Accelerated Self-Healing Techniques., , and . DAC, page 171:1-171:6. ACM, (2014)Boosters for driving long on-chip interconnects: design issues, interconnect synthesis and comparison with repeaters., and . ISPD, page 204-211. ACM, (2001)Leakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems., and . ISCAS, page 252-255. IEEE, (2008)Repeater and current-sensing hybrid circuits for on-chip interconnects., and . ACM Great Lakes Symposium on VLSI, page 269-272. ACM, (2003)