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Dynamic Power Management of Off-Chip Links for Hybrid Memory Cubes., , and . DAC, page 139:1-139:6. ACM, (2014)PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture., , , and . ISCA, page 336-348. ACM, (2015)A scalable processing-in-memory accelerator for parallel graph processing., , , , and . ISCA, page 105-117. ACM, (2015)Memory fast-forward: a low cost special function unit to enhance energy efficiency in GPU for big data processing., , , , and . DATE, page 1341-1346. ACM, (2015)Locality-aware vertex scheduling for GPU-based graph computation., , , and . VLSI-SoC, page 195-200. IEEE, (2015)DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture., , and . HPCA, page 25-36. IEEE Computer Society, (2014)Nonvolatile Write Buffer-Based Journaling Bypass for Storage Write Reduction in Mobile Devices., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (9): 1747-1759 (2018)THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures., , , and . ASP-DAC, page 773-778. IEEE, (2015)Lower-bits cache for low power STT-RAM caches., and . ISCAS, page 480-483. IEEE, (2012)Resource-shared custom instruction generation under performance/area constraints., , , and . ISSoC, page 1-6. IEEE, (2012)