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Disambiguation of "Theodorou, George"

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Power-aware optimization of software-based self-test for L1 caches in microprocessors.

, , , and . IOLTS, page 154-159. IEEE, (2014)

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Marina Theodorou

Nicolaos Théodorou

Panagiotis Theodorou

Angelika Theodorou

Panagiota Theodorou

 

Other publications of authors with the same name

Optimal periodic testing of intermittent faults in embedded pipelined processor applications., , , , , , and . DATE, page 65-70. European Design and Automation Association, Leuven, Belgium, (2006)A single chip dependable and adaptable payload Data Processing Unit., , , , and . IOLTS, page 138-143. IEEE, (2015)The Use of CT Scans and 3D Modeling as a Powerful Tool to Assist Fossil Vertebrate Taxonomy., , , , and . EuroMed (1), volume 11196 of Lecture Notes in Computer Science, page 79-89. Springer, (2018)A 3.3 Gbps CCSDS 123.0-B-1 Multispectral & Hyperspectral Image Compression Hardware Accelerator on a Space-Grade SRAM FPGA., , , and . IEEE Trans. Emerg. Top. Comput., 9 (1): 90-103 (2021)A Software-Based Self-Test methodology for on-line testing of processor caches., , , and . ITC, page 1-10. IEEE Computer Society, (2011)Directed Random SBST Generation for On-Line Testing of Pipelined Processors., , , and . IOLTS, page 273-279. IEEE Computer Society, (2008)A software-based self-test methodology for in-system testing of processor cache tag arrays., , , and . IOLTS, page 159-164. IEEE Computer Society, (2010)A Software-Based Self-Test methodology for on-line testing of data TLBs., , , , and . ETS, page 1. IEEE Computer Society, (2012)Hybrid-SBST Methodology for Efficient Testing of Processor Cores., , , , and . IEEE Des. Test Comput., 25 (1): 64-75 (2008)Power-aware optimization of software-based self-test for L1 caches in microprocessors., , , and . IOLTS, page 154-159. IEEE, (2014)