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Run-time Mapping of Spiking Neural Networks to Neuromorphic Hardware.

, , , and . J. Signal Process. Syst., 92 (11): 1293-1302 (2020)

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Enabling Resource-Aware Mapping of Spiking Neural Networks via Spatial Decomposition., , , , , , , and . CoRR, (2020)A Framework for the Analysis of Throughput-Constraints of SNNs on Neuromorphic Hardware., and . ISVLSI, page 193-196. IEEE, (2019)RotaSYN: Rotary Traveling Wave Oscillator SYNthesizer., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (7): 2685-2698 (2019)NeuSB: A Scalable Interconnect Architecture for Spiking Neuromorphic Hardware., , , , , and . IEEE Trans. Emerg. Top. Comput., 11 (2): 373-387 (April 2023)Dynamic Reliability Management in Neuromorphic Computing., , , , , , , and . CoRR, (2021)DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware., , , , , and . ACM Trans. Embed. Comput. Syst., 21 (3): 27:1-27:35 (2022)Design of Many-Core Big Little μBrain for Energy-Efficient Embedded Neuromorphic Computing., , , , , and . CoRR, (2021)Design of Many-Core Big Little µBrains for Energy-Efficient Embedded Neuromorphic Computing., , , , , and . DATE, page 1011-1016. IEEE, (2022)A Framework to Explore Workload-Specific Performance and Lifetime Trade-offs in Neuromorphic Computing., , , , , , and . IEEE Comput. Archit. Lett., 18 (2): 149-152 (2019)Enabling Resource-Aware Mapping of Spiking Neural Networks via Spatial Decomposition., , , , , , , and . IEEE Embed. Syst. Lett., 13 (3): 142-145 (2021)