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Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC.

S. Venkateswarlu, S. Mishra, H. Oprins, B. Vermeersch, M. Brunion, J. Han, M. Stan, D. Biswas, P. Weckx, and F. Catthoor. IEEE Trans. Very Large Scale Integr. Syst., 31 (12): 1896-1904 (December 2023)

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Dushyant Mishra

K Mishra

Robin Mishra

Brahmdatt Mishra

Satish Mishra

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Thermal Performance Analysis of Mempool RISC-V Multicore SoC.S. Venkateswarlu, S. Mishra, H. Oprins, B. Vermeersch, M. Brunion, J. Han, M. Stan, P. Weckx, and F. Catthoor. IEEE Trans. Very Large Scale Integr. Syst., 30 (11): 1668-1676 (2022)Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs).S. Mishra, S. Venkateswarlu, B. Vermeersch, M. Brunion, M. Lofrano, D. Abdi, H. Oprins, D. Biswas, O. Zografos, G. Hiblot and 6 other author(s). IRPS, page 1-7. IEEE, (2023)Overhead Reduction with Optimal Margining Using A Reliability Aware Design Paradigm.S. Mishra, P. Weckx, O. Zografos, J. Lin, A. Spessot, and F. Catthoor. IRPS, page 1-7. IEEE, (2021)Learning-Oriented Reliability Improvement of Computing Systems From Transistor to Application Level.B. Ranjbar, F. Klemme, P. Genssler, H. Amrouch, J. Jung, S. Dave, H. So, K. Lee, A. Shrivastava, J. Lin and 5 other author(s). DATE, page 1-10. IEEE, (2023)Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC.S. Venkateswarlu, S. Mishra, H. Oprins, B. Vermeersch, M. Brunion, J. Han, M. Stan, D. Biswas, P. Weckx, and F. Catthoor. IEEE Trans. Very Large Scale Integr. Syst., 31 (12): 1896-1904 (December 2023)Multitimescale Mitigation for Performance Variability Improvement in Time-Critical Systems.J. Lin, P. Weckx, S. Mishra, A. Spessot, and F. Catthoor. IEEE Trans. Very Large Scale Integr. Syst., 30 (11): 1757-1769 (2022)Proactive Run-Time Mitigation for Time-Critical Applications Using Dynamic Scenario Methodology.J. Lin, P. Weckx, S. Mishra, A. Spessot, and F. Catthoor. DATE, page 616-621. IEEE, (2022)Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS).S. Mishra, P. Weckx, J. Lin, B. Kaczer, D. Linten, A. Spessot, and F. Catthoor. IRPS, page 1-5. IEEE, (2020)Electromigration-aware design technology co-optimization for SRAM in advanced technology nodes.M. Mayahinia, H. Liu, S. Mishra, Z. Tokei, F. Catthoor, and M. Tahoori. DATE, page 1-6. IEEE, (2023)

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Disambiguation of "Mishra, Subrat"

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Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC.

Please choose a person to relate this publication to

Dushyant Mishra

K Mishra

Robin Mishra

Brahmdatt Mishra

Satish Mishra

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Mishra, Subrat"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC.

Please choose a person to relate this publication to

Dushyant Mishra

K Mishra

Robin Mishra

Brahmdatt Mishra

Satish Mishra

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC.