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A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application., , , and . VLSI-DAT, page 1-4. IEEE, (2019)FUBOCO: Structure Synthesis of Basic Op-Amps by FUnctional BlOck COmposition., and . ACM Trans. Design Autom. Electr. Syst., 27 (6): 63:1-63:27 (2022)Structure Synthesis of Op-Amps by Functional Block Composition., and . CoRR, (2021)Recovery of 2D and 3D Layout Information through an Advanced Image Stitching Algorithm using Scanning Electron Microscope Images., , and . ICPR, page 3860-3867. IEEE, (2020)Reliability optimization of analog integrated circuits considering the trade-off between lifetime and area., and . Microelectron. Reliab., 52 (8): 1559-1564 (2012)Analog Synthesis - The Deterministic Way.. ISPD, page 167-174. ACM, (2022)Structural Synthesis of Operational Amplifiers Based on Functional Block Modeling., and . ICCAD, page 53:1-53:6. IEEE, (2020)A pre-search assisted ILP approach to analog integrated circuit routing., , and . ICCD, page 244-250. IEEE Computer Society, (2015)Design-dependent Monitors Based on Delay Sensitivity Tracking., , , , , and . ICECS, page 633-636. IEEE, (2018)A Hysteretic Buck Converter With 92.1% Maximum Efficiency Designed for Ultra-Low Power and Fast Wake-Up SoC Applications., , , , , , , and . IEEE J. Solid State Circuits, 53 (6): 1856-1868 (2018)