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XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs., , and . DAC, page 22:1-22:10. ACM, (2013)IMPRES: integrated monitoring for processor reliability and security., and . DAC, page 502-505. ACM, (2006)HW-SW Co-Synthesis: The Present and The Future (Embedded Tutorial).. ASP-DAC, page 19-22. IEEE, (1998)Speeding up single pass simulation of PLRUt caches., , and . ASP-DAC, page 695-700. IEEE, (2015)SDG2KPN: System Dependency Graph to function-level KPN generation of legacy code for MPSoCs., , , , and . ASP-DAC, page 267-273. IEEE, (2014)Improving tag generation for memory data authentication in embedded processor systems., , , and . ASP-DAC, page 50-55. IEEE, (2016)Unrolling Loops With Indeterminate Loop Counts in System Level Pipelines., and . ASP-DAC, page 99-104. IEEE, (1998)LOP: A packet classification architecture with higher throughput and lower power consumption than TCAM., , and . Des. Autom. Embed. Syst., 14 (3): 231-263 (2010)Custom Floating-Point Unit Generation for Embedded Systems., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (5): 638-650 (2009)Profiling in the ASP codesign environment., , and . J. Syst. Archit., 46 (14): 1263-1274 (2000)