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Session 5 overview: Analog techniques., , and . ISSCC, page 84-85. IEEE, (2017)Behavioral analysis of self-oscillating class D line drivers., and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (4): 706-714 (2005)Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 μ m HV-CMOS Technology., , and . IEEE J. Solid State Circuits, 46 (2): 485-497 (2011)Session 5 overview: Analog techniques., and . ISSCC, page 86-87. IEEE, (2016)Oscillator pulling and synchronisation issues in self-oscillating class D power amplifiers., and . ESSCIRC, page 529-532. IEEE, (2003)Highly efficient xDSL line drivers in 0.35-μm CMOS using a self-oscillating power amplifier., and . IEEE J. Solid State Circuits, 38 (1): 22-29 (2003)16.5 A flexible thin-film pixel array with a charge-to-current gain of 59µA/pC and 0.33% nonlinearity and a cost effective readout circuit for large-area X-ray imaging., , , , , , , and . ISSCC, page 296-297. IEEE, (2016)Introduction to the Special Issue on the 2017 IEEE International Solid-State Circuits Conference., , , , and . IEEE J. Solid State Circuits, 52 (12): 3115-3118 (2017)A high-voltage output driver in a 2.5-V 0.25-μm CMOS technology., , , and . IEEE J. Solid State Circuits, 40 (3): 576-583 (2005)A 1.5W 10V-output Class-D amplifier using a boosted supply from a single 3.3V input in standard 1.8V/3.3V 0.18μm CMOS., , , and . ISSCC, page 94-96. IEEE, (2012)