( en | de | ru )

 

Disambiguation of "Zanchi, Alfio"

Author of the publication

copydeleteadd this publication to your clipboard
A 16-bit 65-MS/s Pipeline ADC With 80-dBFS SNR Using Analog Auto-Calibration in SiGe SOI Complementary BiCMOS.

, and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (8): 2166-2177 (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Alfio Borzi

Mino Zanchi

Alfio Marazzi

Alfio Pappalardo

Alfio Cerami

 

Other publications of authors with the same name

Phase noise degradation at high oscillation amplitudes in LC-tuned VCO's., , , , and . IEEE J. Solid State Circuits, 35 (1): 96-99 (2000)A diode-less compact voltage/frequency reference-in-one.. CICC, page 1-4. IEEE, (2018)Analysis and Characterization of the Effects of Clock Jitter in A/D Converters for Subsampling., and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (2): 522-534 (2008)Design Issues of LC Tuned Oscillators for Integrated Transceivers., , , and . Great Lakes Symposium on VLSI, page 264-269. IEEE Computer Society, (1998)A 2-V 2.5-GHz-104-dBc/Hz at 100 kHz fully integrated VCO with wide-band low-noise automatic amplitude control loop., , , and . IEEE J. Solid State Circuits, 36 (4): 611-619 (2001)Automatic amplitude control loop for a 2-V, 2.5-GHz LC-tank VCO., , , , and . CICC, page 209-212. IEEE, (2001)A 16-bit 65-MS/s 3.3-V pipeline ADC core in SiGe BiCMOS with 78-dB SNR and 180-fs jitter., and . IEEE J. Solid State Circuits, 40 (6): 1225-1237 (2005)Measurement and SPICE prediction of sub-picosecond clock jitter in A/D converters., , and . ISCAS (5), page 557-560. IEEE, (2003)A 16-bit 65-MS/s Pipeline ADC With 80-dBFS SNR Using Analog Auto-Calibration in SiGe SOI Complementary BiCMOS., and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (8): 2166-2177 (2008)Impact of capacitor dielectric relaxation on a 14-bit 70-MS/s pipeline ADC in 3-V BiCMOS., , and . IEEE J. Solid State Circuits, 38 (12): 2077-2086 (2003)