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Cryogenic Memory Technologies., , , and . CoRR, (2021)Design Methodology for Scalable 2.5D/3D Heterogenous Tiled Chiplet Systems., , , , , , , , , and 1 other author(s). ISQED, page 1-4. IEEE, (2022)Emerging reconfigurable nanotechnologies: can they support future electronics?, , , , , , , and . ICCAD, page 13. ACM, (2018)A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support., , , , , , , , , and 3 other author(s). ISLPED, page 34:1-34:6. ACM, (2018)A 93 TOPS/Watt Near-Memory Reconfigurable SAD Accelerator for HEVC/AV1/JEM Encoding., , , , , , , , and . DATE, page 1400-1403. IEEE, (2021)A Power-Efficient Hybrid Architecture Design for Image Recognition Using CNNs., , , , and . ISVLSI, page 22-27. IEEE Computer Society, (2018)On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs., , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (10): 1603-1613 (October 2023)ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (7): 2533-2545 (2019)Monolithic-3D Integration Augmented Design Techniques for Computing in SRAMs., , , , , and . ISCAS, page 1-5. IEEE, (2019)