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Disambiguation of "Kuroki, Nobutaka"

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A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs.

, , , and . ESSCIRC, page 199-202. IEEE, (2011)

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Nobutaka Ito

 

Other publications of authors with the same name

A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator., , , , , and . ICECS, page 97-100. IEEE, (2012)A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters., , , , , and . ESSCIRC, page 255-258. IEEE, (2014)A 24-transistor static flip-flop consisting of nors and inverters for low-power digital vlsis., , , , and . NEWCAS, page 137-140. IEEE, (2014)A fully-integrated, high-conversion-ratio and dual-output voltage boost converter with MPPT for low-voltage energy harvesting., , , , and . A-SSCC, page 1-4. IEEE, (2015)An Error Diagnosis Technique Based on Clustering of Elements., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (12): 2490-2496 (2010)A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs., , , and . IEICE Electron. Express, 8 (12): 890-896 (2011)A 35-mV supply ring oscillator consisting of stacked body bias inverters for extremely low-voltage LSIs., , , , , , , , and . IEICE Electron. Express, 18 (6): 20210065 (2021)An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications., , , , and . ISCAS, page 1-4. IEEE, (2017)A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit., , , , , and . IEICE Trans. Electron., 97-C (6): 512-518 (2014)An Evaluation of Triple Density Error Diffusion for Medical Monochrome LCDs., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (6): 1866-1868 (2006)