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Low-Latency Asynchronous FIFO's Using Token Rings.

, and . ASYNC, page 210-. IEEE Computer Society, (2000)

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Low-Latency Asynchronous FIFO's Using Token Rings., and . ASYNC, page 210-. IEEE Computer Society, (2000)Self-Resetting Latches for Asynchronous Micro-Pipelines., , and . DAC, page 986-989. IEEE, (2007)Resynthesis and Peephole Transformations for the Optimization of Large-Scale Asynchronous Systems., and . IWLS, page 355-360. (2002)Tartan: evaluating spatial computation for whole program execution., , , , , and . ASPLOS, page 163-174. ACM, (2006)Robust Interfaces for Mixed-Timing Systems with Application to Latency-Insensitive Protocols., and . DAC, page 21-26. ACM, (2001)Global Critical Path: A Tool for System-Level Timing Analysis., , , and . DAC, page 783-786. IEEE, (2007)Robust interfaces for mixed-timing systems., and . IEEE Trans. Very Large Scale Integr. Syst., 12 (8): 857-873 (2004)Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis., , and . ASYNC, page 117-128. IEEE Computer Society, (2007)Hardware compilation of application-specific memory-access interconnect., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (5): 756-771 (2006)SOMA: a tool for synthesizing and optimizing memory accesses in ASICs., , , and . CODES+ISSS, page 231-236. ACM, (2005)