Author of the publication

Encryption using reconfigurable reversible logic gate and its simulation in FPGAs.

, , , , and . MIXDES, page 203-206. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Optimal 4-bit Reversible Mixed-Polarity Toffoli Circuits., and . RC, volume 7581 of Lecture Notes in Computer Science, page 138-151. Springer, (2012)On Boolean Functions Having Maximal Number of Subfunction Classes. SWAT, page 205-211. IEEE Computer Society, (1974)Regular Realization of Symmetric Functions Using Reversible Logic., , , , , , , , , and . DSD, page 245-253. IEEE Computer Society, (2001)A new heuristic algorithm for reversible logic synthesis.. DAC, page 834-837. ACM, (2004)Terary GFSOP Minimization Using Kronecker Decision Diagrams and Their Synthesis with Quantum Cascades., , , and . J. Multiple Valued Log. Soft Comput., 11 (5-6): 567-602 (2005)Minimizing Reversible Circuits in the 2n Scheme Using Two and Three Bits Patterns., , , , and . DSD, page 708-711. IEEE Computer Society, (2014)Multi-Output Galois Field Sum of Products Synthesis with New Quantum Cascades., , and . ISMVL, page 146-153. IEEE Computer Society, (2003)Reversible Logic Synthesis by Iterative Compositions., , and . IWLS, page 261-266. (2002)An Approach to Minimization of Decision Diagrams .. DSD, page 79-86. IEEE Computer Society, (2001)Analysis of Reversible and Quantum Finite State Machines Using Homing, Synchronizing and Distinguishing Input Sequences., , , and . ISMVL, page 322-327. IEEE Computer Society, (2013)