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Model of a true random number generator aimed at cryptographic applications., , , and . ISCAS, IEEE, (2006)Optimization of the PLL based TRNG design using the genetic algorithm., , , and . ISCAS, page 1-4. IEEE, (2017)Key Reconciliation Protocols for Error Correction of Silicon PUF Responses., , , and . IEEE Trans. Inf. Forensics Secur., 12 (8): 1988-2002 (2017)An open-source multi-FPGA modular system for fair benchmarking of True Random Number Generators., , and . FPL, page 1-4. IEEE, (2013)Two IP protection schemes for multi-FPGA systems., , , and . ReConFig, page 1-6. IEEE, (2012)Disposable configuration of remotely reconfigurable systems., , , , and . Microprocess. Microsystems, 39 (6): 382-392 (2015)InvMixColumn decomposition and multilevel resource sharing in AES implementations., , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (8): 989-992 (2005)Architectures of flexible symmetric key crypto engines - a survey: From hardware coprocessor to multi-crypto-processor system on chip., , , , and . ACM Comput. Surv., 45 (4): 41:1-41:32 (2013)A Very High Speed True Random Number Generator with Entropy Assessment., , , and . CHES, volume 8086 of Lecture Notes in Computer Science, page 179-196. Springer, (2013)Transient Effect Ring Oscillators Leak Too., , , , and . ISVLSI, page 37-42. IEEE, (2019)