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Storage optimization by replacing some flip-flops with latches.

, and . EURO-DAC, page 296-301. IEEE Computer Society Press, (1996)

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A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost., , and . ASP-DAC, page 672-677. IEEE Computer Society, (2007)Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC/NoC Designs., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (12): 2581-2589 (2010)Register minimization beyond sharing among variables., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (12): 1583-1587 (1996)A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy., , , and . ISCAS, page 1-5. IEEE, (2023)Storage optimization by replacing some flip-flops with latches., and . EURO-DAC, page 296-301. IEEE Computer Society Press, (1996)A Method of Embedded Memory Access Time Measurement., and . ISQED, page 462-465. IEEE Computer Society, (2001)IR Drop Reduction via a Flip-Flop Resynthesis Technique., , , and . ISQED, page 78-83. IEEE Computer Society, (2008)Live Demonstration: A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy., , , and . ISCAS, page 1. IEEE, (2023)A Synthesis Method for Mixed Synchronous / Asynchronous Behavior., , , and . EDAC-ETC-EUROASIC, page 277-281. IEEE Computer Society, (1994)A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (12): 2718-2726 (2007)