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Disambiguation of "Cavalcante, Matheus A."

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An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication.

, , , , , , and . CoRR, (2020)

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Rüdiger Matheus

Jochen Matheus

Ricarda Matheus

Michael Matheus

Gothild Matheus

 

Other publications of authors with the same name

MemPool: A Shared-L1 Memory Many-Core Cluster with a Low-Latency Interconnect., , , and . CoRR, (2020)MX: Enhancing RISC-V's Vector ISA for Ultra-Low Overhead, Energy-Efficient Matrix Multiplication., , , , and . CoRR, (2024)MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration., , , , , , , , and . DATE, page 394-399. IEEE, (2022)SimEON: an open-source elastic optical network simulator for academic and industrial purposes., , and . Photonic Netw. Commun., 34 (2): 193-201 (2017)Evolutionary Multiobjective Strategy for Regenerator Placement in Elastic Optical Networks., , , and . IEEE Trans. Commun., 66 (8): 3583-3596 (2018)Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (2): 530-543 (2020)Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI., , , , and . CoRR, (2019)Yun: An Open-Source, 64-Bit RISC-V-Based Vector Processor With Multi-Precision Integer and Floating-Point Support in 65-nm CMOS., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (10): 3732-3736 (October 2023)FlooNoC: A Multi-Tbps Wide NoC for Heterogeneous AXI4 Traffic., , , , and . CoRR, (2023)Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency., , , and . CoRR, (2023)