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SPEC-AX and PARSEC-AX: extracting accelerator benchmarks from microprocessor benchmarks.

, , and . IISWC, page 117-127. IEEE Computer Society, (2016)

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DASX: Hardware Accelerator for Software Data Structures., , , and . ICS, page 361-372. ACM, (2015)Cache Coherence for GPU Architectures., , , , and . IEEE Micro, 34 (3): 69-79 (2014)μIR -An intermediate representation for transforming and optimizing the microarchitecture of application accelerators., , , , , , and . MICRO, page 940-953. ACM, (2019)Safety-Guaranteed Real-Time Trajectory Planning for Underwater Vehicles in Plane-Progressive Waves., , , , and . CDC, page 5249-5254. IEEE, (2020)NACHOS: Software-Driven Hardware-Assisted Memory Disambiguation for Accelerators., , , and . HPCA, page 710-723. IEEE Computer Society, (2018)Tapping into Parallelism with Transactional Memory., , and . login Usenix Mag., (2009)Bitwise data parallelism in regular expression matching., , , , , , and . PACT, page 139-150. ACM, (2014)Implementation tradeoffs in the design of flexible transactional memory support., , and . J. Parallel Distributed Comput., 70 (10): 1068-1084 (2010)An Application-Tailored Approach to Hardware Cache Coherence., , and . Computer, 46 (10): 40-47 (2013)mu-grind: A Framework for Dynamically Instrumenting HLS-Generated RTL., , , and . PACT, page 346-358. ACM, (2022)