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Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks.

, , , and . VLSI Design, page 177-182. IEEE Computer Society, (2003)

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Low Energy Switch Block For FPGAs., and . VLSI Design, page 209-214. IEEE Computer Society, (2004)A New Divide and Conquer Method for Achieving High Speed Division in Hardware., , , and . ASP-DAC/VLSI Design, page 535-540. IEEE Computer Society, (2002)Energy-efficient FPGA interconnect architecture design (abstract only)., , and . FPGA, page 268. ACM, (2005)Encoded-Low Swing Technique for Ultra Low Power Interconnect., , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 240-251. Springer, (2003)Low energy FPGA interconnect design., , and . ACM Great Lakes Symposium on VLSI, page 393-396. ACM, (2004)Energy-efficient FPGA interconnect design., , and . DATE Designers' Forum, page 42-47. European Design and Automation Association, Leuven, Belgium, (2006)Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks., , , and . VLSI Design, page 177-182. IEEE Computer Society, (2003)