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Fault Coverage on RF VCOs and BIST for Wafer Sort Using Peak-to-Peak Voltage Detectors.

, , , , and . J. Electron. Test., 26 (3): 355-365 (2010)

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Qualification of behavioral level design validation for AMS & RF SoCs., , , , and . VLSI-SoC, page 206-211. IEEE, (2007)A SNDR BIST for Sigma-Delta Analogue-to-Digital Converters., , , and . VTS, page 314-319. IEEE Computer Society, (2006)Decreasing Test Qualification Time in AMS and RF Systems., , , , and . IEEE Des. Test Comput., 25 (1): 29-37 (2008)A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting., , , and . J. Electron. Test., 22 (4-6): 325-335 (2006)Fault Coverage on RF VCOs and BIST for Wafer Sort Using Peak-to-Peak Voltage Detectors., , , , and . J. Electron. Test., 26 (3): 355-365 (2010)A stereo audio Σ∑ ADC architecture with embedded SNDR self-test., , , , and . ITC, page 1-10. IEEE Computer Society, (2007)BIST scheme for RF VCOs allowing the self-correction of the cut., , , , , and . ITC, page 1-10. IEEE Computer Society, (2009)Optimising Test Sets for a Low Noise Amplifier with a Defect-Oriented Approach., , , and . DATE, page 170-171. IEEE Computer Society, (2005)Interactive presentation: Evaluation of test measures for LNA production testing using a multinormal statistical model., , and . DATE, page 731-736. EDA Consortium, San Jose, CA, USA, (2007)