( en | de | ru )

 

Disambiguation of "Lee, Soo-Min"

Author of the publication

copydeleteadd this publication to your clipboard
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface.

, , , , , , , , , and . IEEE J. Solid State Circuits, 51 (8): 1890-1901 (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Min Lee

Min-Soo Park

Min Soo Park

Min-Hi Lee

Induction and regulation of antiviral defence mechanisms through intracytoplasmic sensors. HU Berlin, (2009)

Dug-Soo Lee

 

Other publications of authors with the same name

A slew-rate controlled transmitter to compensate for the crosstalk-induced jitter of coupled microstrip lines., , , and . CICC, page 1-4. IEEE, (2010)Genome sequence of the hot pepper provides insights into the evolution of pungency in Capsicum species, , , , , , , , , and 61 other author(s). Nat. Genet., (2014)A 27% reduction in transceiver power for single-ended point-to-point DRAM interface with the termination resistance of 4×Z0 at both TX and RX., , , , , , and . ISSCC, page 308-309. IEEE, (2013)A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination., , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (12): 987-991 (2014)A Transmitter to Compensate for Crosstalk-Induced Jitter by Subtracting a Rectangular Crosstalk Waveform From Data Signal During the Data Transition Time in Coupled Microstrip Lines., , , , and . IEEE J. Solid State Circuits, 47 (9): 2068-2079 (2012)A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLL., , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (10): 687-691 (2011)An 8nm All-Digital 7.3Gb/s/pin LPDDR5 PHY with an Approximate Delay Compensation Scheme., , , , , , , , , and 8 other author(s). VLSI Circuits, page 96-. IEEE, (2019)23.6 A 0.6V 4.266Gb/s/pin LPDDR4X interface with auto-DQS cleaning and write-VWM training for memory controller., , , , , , , , , and 7 other author(s). ISSCC, page 398-399. IEEE, (2017)Information Technology Payoff: A Panel Data Application to Swine Farm in Korea., and . AMCIS, page 502. Association for Information Systems, (2010)Method for Evaluating the Security Risk of a Website Against Phishing Attacks., , , , , and . ISI Workshops, volume 5075 of Lecture Notes in Computer Science, page 21-31. Springer, (2008)