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Optical Interconnect for High-End Computer Systems., , , , , , , , , and 1 other author(s). IEEE Des. Test Comput., 27 (4): 10-19 (2010)Computer Systems Based on Silicon Photonic Interconnects., , , , , , , , and . Proc. IEEE, 97 (7): 1337-1361 (2009)A 100+ Meter 12 Gb/s/Lane Copper Cable Link Based on Clock-Forwarding., , , and . IEEE J. Solid State Circuits, 48 (4): 1085-1098 (2013)Silicon-photonic network architectures for scalable, power-efficient multi-chip systems., , , , , and . ISCA, page 117-128. ACM, (2010)On-chip samplers for test and debug of asynchronous circuits., , , and . ASYNC, page 153-162. IEEE Computer Society, (2007)Robust Energy-Efficient Adder Topologies., , , , and . IEEE Symposium on Computer Arithmetic, page 16-28. IEEE Computer Society, (2007)Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS., , , , , , and . IEEE J. Solid State Circuits, 40 (1): 261-275 (2005)Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference., , , and . IEEE J. Solid State Circuits, 44 (1): 3-6 (2009)High Speed and Low Energy Capacitively Driven On-Chip Wires., , , , , , and . IEEE J. Solid State Circuits, 43 (1): 52-60 (2008)A micro-architectural analysis of switched photonic multi-chip interconnects., , , , , , , and . ISCA, page 153-164. IEEE Computer Society, (2012)