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Disambiguation of "Dehaene, Wim"

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UML 2 and SysML: An Approach to Deal with Complexity in SoC/NoC Design.

, and . DATE, page 716-717. IEEE Computer Society, (2005)

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Wim Wätjen

Wim Lutzke

Wim Broekaert

Wim Beyers

Wim Damen

 

Other publications of authors with the same name

Dense, 11 V-Tolerant, Balanced Stimulator IC with Digital Time-Domain Calibration for $100 nA Error., and . IEEE Trans. Biomed. Circuits Syst., 17 (5): 1166-1176 (October 2023)A 16nm 128kB high-density fully digital In Memory Compute macro with reverse SRAM pre-charge achieving 0.36TOPs/mm2, 256kB/mm2 and 23. 8TOPs/W., , , and . ESSCIRC, page 409-412. IEEE, (2023)Dual-Input Pseudo-CMOS Logic for Digital Applications on Flexible Substrates., , and . ESSCIRC, page 255-258. IEEE, (2021)A flexible, ultra-low power 35pJ/pulse digital back-end for a QAC UWB receiver., and . ESSCIRC, page 236-239. IEEE, (2007)A dual port dual width 90nm SRAM with guaranteed data retention at minimal standby supply voltage., and . ESSCIRC, page 290-293. IEEE, (2008)30.1 8b Thin-film microprocessor using a hybrid oxide-organic complementary technology with inkjet-printed P2ROM memory., , , , , , , , , and 7 other author(s). ISSCC, page 486-487. IEEE, (2014)Energy and side-channel security evaluation of near-threshold cryptographic circuits in 28nm FD-SOI technology., , , , , , , , and . CF, page 258-262. ACM, (2022)Design and Synthesis of Pareto Buffers Offering Large Range Runtime Energy/Delay Tradeoffs Via Combined Buffer Size and Supply Voltage Tuning., , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (1): 117-127 (2009)A Differential Transmission Gate Design Flow for Minimum Energy Sub-10-pJ/Cycle ARM Cortex-M0 MCUs., and . IEEE J. Solid State Circuits, 52 (7): 1904-1914 (2017)A Thin-Film, a-IGZO, 128b SRAM and LPROM Matrix With Integrated Periphery on Flexible Foil., , , , , , , and . IEEE J. Solid State Circuits, 52 (11): 3095-3103 (2017)