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Disambiguation of "de Clavijo, Paulino Ruiz"

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Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits.

, , , , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 501-510. Springer, (2003)

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Paulino Capdepón

José-Manuel Ruiz-Marcos

Jose Miguel Ruiz

Roberto Ulises Ruiz Saucedo

Margarita Ruiz Kolb

 

Other publications of authors with the same name

A Proposal for a New Way of Classifying Network Security Metrics: Study of the Information Collected through a Honeypot., , , , and . QRS Companion, page 633-634. IEEE, (2018)Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements., , , , , , and . IES, page 1-7. IEEE, (2006)Accurate Logic-Level Current Estimation for Digital CMOS Circuits., , , , , , and . J. Low Power Electron., 2 (1): 87-94 (2006)Improving the Performance of Static CMOS Gates by Using Independent Bodies., , , , , , and . J. Low Power Electron., 3 (1): 70-77 (2007)Using the complement of the cosine to compute trigonometric functions., , , , , , and . EURASIP J. Adv. Signal Process., 2020 (1): 1-21 (2020)Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates., , , , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 389-398. Springer, (2008)Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation., , , , and . IEEE Trans. Instrum. Meas., 60 (12): 3961-3963 (2011)Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits., , , , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 501-510. Springer, (2003)Design of a FFT/IFFT module as an IP core suitable for embedded systems., , , , , , , and . SIES, page 337-340. IEEE, (2007)Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level., , , , , and . PATMOS, volume 2451 of Lecture Notes in Computer Science, page 353-362. Springer, (2002)