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FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices.

, , , , , and . IEEE Trans. Educ., 50 (3): 229-235 (2007)

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Fully-parallel LUT-based (2048, 1723) LDPC code decoder for FPGA., , , and . ICECS, page 408-411. IEEE, (2012)Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard., , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 102-111. Springer, (2002)Design of Power and Area Efficient Digital Down-converters for Broadband Communications Systems., , , , and . J. Signal Process. Syst., 56 (1): 35-40 (2009)High-throughput FPGA-based emulator for structured LDPC codes., , , and . ICECS, page 404-407. IEEE, (2012)DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems., , , , , , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 988-991. Springer, (2003)FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices., , , , , and . IEEE Trans. Educ., 50 (3): 229-235 (2007)Design of high performance timing recovery loops for communication applications., , , and . SiPS, page 1-4. IEEE, (2006)FPGA-implementation of atan(Y/X) based on logarithmic transformation and LUT-based techniques., , and . J. Syst. Archit., 56 (11): 588-596 (2010)