Author of the publication

FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template.

, , , , , , , , and . ISCA, page 11-22. ACM, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Range Translations for Fast Virtual Memory., , , , , , , , and . IEEE Micro, 36 (3): 118-126 (2016)Agile Paging for Efficient Memory Virtualization., , and . IEEE Micro, 37 (3): 80-86 (2017)BypassD: Enabling fast userspace access to shared SSDs., , , , and . ASPLOS (1), page 35-51. ACM, (2024)Mosaic: Enabling Application-Transparent Support for Multiple Page Sizes in Throughput Processors., , , , , , and . ACM SIGOPS Oper. Syst. Rev., 52 (1): 27-44 (2018)Mitosis: Transparently Self-Replicating Page-Tables for Large-Memory Machines., , , , and . ASPLOS, page 283-300. ACM, (2020)ASPLOS 2020 was canceled because of COVID-19..Enhancing and Exploiting Contiguity for Fast Memory Virtualization., , , , , , and . ISCA, page 515-528. IEEE, (2020)MASK: Redesigning the GPU Memory Hierarchy to Support Multi-Application Concurrency., , , , , , , and . ASPLOS, page 503-518. ACM, (2018)Agile Paging: Exceeding the Best of Nested and Shadow Paging., , and . ISCA, page 707-718. IEEE Computer Society, (2016)Improving Multi-Application Concurrency Support Within the GPU Memory System., , , , , , , and . CoRR, (2017)The gem5 Simulator: Version 20.0+., , , , , , , , , and 63 other author(s). CoRR, (2020)