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PLA-based regular structures and their synthesis., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (6): 723-729 (2003)Explicit and implicit algorithms for binate covering problems., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (7): 677-691 (1997)Theory of safe replacements for sequential circuits., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (2): 249-265 (2001)Two-Level Minimization of Multivalued Functions with Large Offsets., , , and . IEEE Trans. Computers, 42 (11): 1325-1342 (1993)River PLAs: a regular circuit structure., and . DAC, page 201-206. ACM, (2002)Generalized cofactoring for logic function evaluation., , and . DAC, page 155-158. ACM, (2003)DAG-aware AIG rewriting a fresh look at combinational logic synthesis., , and . DAC, page 532-535. ACM, (2006)VIS: A System for Verification and Synthesis., , , , , , , , , and 6 other author(s). CAV, volume 1102 of Lecture Notes in Computer Science, page 428-432. Springer, (1996)Timed Boolean functions - a unified formalism for exact timing analysis., and . The Kluwer international series in engineering and computer science Kluwer, (1994)Integration of retiming with architectural floorplanning., , , and . Integr., 29 (1): 25-43 (2000)