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Adversarial Hardware With Functional and Topological Camouflage., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (5): 1685-1689 (2021)FTDL: An FPGA-tailored Architecture for Deep Learning Systems., , , , , and . FPGA, page 320. ACM, (2020)Dynamic Sparse Training: Find Efficient Sparse Network From Scratch With Trainable Masked Layers., , , , and . ICLR, OpenReview.net, (2020)Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Framework., , , , , , , and . CoRR, (2020)MSP: An FPGA-Specific Mixed-Scheme, Multi-Precision Deep Neural Network Quantization Framework., , , , , , and . CoRR, (2020)A programmable baseband processor for massive MIMO uplink multi-user detection., , , , , and . ASICON, page 1-4. IEEE, (2015)O3BNN-R: An Out-of-Order Architecture for High-Performance and Regularized BNN Inference., , , , , , , and . IEEE Trans. Parallel Distributed Syst., 32 (1): 199-213 (2021)ECI: a Customizable Cache Coherency Stack for Hybrid FPGA-CPU Architectures., , , , , , and . CoRR, (2022)Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Framework., , , , , , , and . HPCA, page 208-220. IEEE, (2021)FTDL: A Tailored FPGA-Overlay for Deep Learning with High Scalability., , , , , , and . DAC, page 1-6. IEEE, (2020)