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An Offloading Scheme for Ultra Low Power Data-Driven Networking System.

, , , and . PDPTA, page 595-601. CSREA Press, (2009)

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EDA-oriented FPGA Circuit Design Method for Four-phase Bundled-data Circular Self-timed Pipeline., , , , and . J. Inf. Process., (2023)Self-Timed Power Gating for Ultra-Low-Power Pipeline Circuit., , , , and . PDPTA, page 575-580. CSREA Press, (2009)Direct Generation of Data-Driven Program for Stream-Oriented Processing., , and . IEEE PACT, page 295-306. IEEE Computer Society, (1997)An Offloading Scheme for Ultra Low Power Data-Driven Networking System., , , and . PDPTA, page 595-601. CSREA Press, (2009)Data-Driven Protocol Off-Loading for Ad Hoc Networking Environment., , , , and . PDPTA, page 662-668. CSREA Press, (2008)Stage-by-Stage Power Gating Circuit for Ultra-Low-Power Self-Timed Pipeline., , , and . PDPTA, page 596-602. CSREA Press, (2010)A Software-Defined ADC and DAC on Data-Driven Processor., , and . PDPTA, page 717-723. CSREA Press, (2008)Spatial-Temporal Neural Network for P300 Detection., , , and . IEEE Access, (2021)DDMPs: self-timed super-pipelined data-driven multimedia processors., , and . Proc. IEEE, 87 (2): 282-295 (1999)Speech parameter extraction in noisy environment using a masking model., , and . ICASSP (2), page 81-84. IEEE Computer Society, (1994)