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Disambiguation of "Brändli, Matthias"

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An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2\times$ Interpolating Sense-Amplifier-Latches.

, , , , , , , and . ISSCC, page 266-267. IEEE, (2023)

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Matthias Brändli

Norbert Brändli

Matthias Meyer

Musterbasiertes Re-Engineering von Softwaresystemen. Uni Paderborn, (2009)

Matthias Hägele

Immunrekonstitution nach haploidenter hämatopoetischer Stammzelltransplantation: Einfluss eines CD3-CD19-depletierten gegenüber einem CD34-selektionierten Transplantat. Uni Tübingen, (2008)

Matthias Schmidt

Topographische Verteilung und Morphometrie von retinalen Mikrogliazellen. Uni Münster, (2009)
 

Other publications of authors with the same name

Design of Time-Encoded Spiking Neural Networks in 7-nm CMOS Technology., , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (9): 3639-3643 (September 2023)A 24-72-GS/s 8-b Time-Interleaved SAR ADC With 2.0-3.3-pJ/Conversion and >30 dB SNDR at Nyquist in 14-nm CMOS FinFET., , , , , , , , , and . IEEE J. Solid State Circuits, 53 (12): 3508-3516 (2018)A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 58 (4): 1074-1086 (2023)A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control., , , , , , , , , and 1 other author(s). ESSCIRC, page 57-60. IEEE, (2022)HERMES-Core - A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 57 (4): 1027-1038 (2022)An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2\times$ Interpolating Sense-Amplifier-Latches., , , , , , , and . ISSCC, page 266-267. IEEE, (2023)A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET., , , , , , , , , and 1 other author(s). ISSCC, page 112-114. IEEE, (2019)A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links., , , , , , , , , and 14 other author(s). VLSI Technology and Circuits, page 28-29. IEEE, (2022)An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS., , , , , , , , , and 17 other author(s). VLSI Technology and Circuits, page 168-169. IEEE, (2022)