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A 1-V 3.5-mW CMOS switched-opamp quadrature IF circuitry for Bluetooth receivers.

, , , and . IEEE J. Solid State Circuits, 38 (5): 805-816 (2003)

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A 0.5-V 16 GHz-20 GHz differential injection-locked divider in 0.18-μm CMOS process., and . CICC, page 813-816. IEEE, (2007)A WCDMA/WLAN digital polar transmitter with low-noise ADPLL, wide-band PM/AM modulator and linearized PA in 65nm CMOS., and . ESSCIRC, page 375-378. IEEE, (2014)A 4.1GHz-6.5GHz all-digital frequency synthesizer with a 2nd-order noise-shaping TDC and a transformer-coupled QVCO., , and . ESSCIRC, page 189-192. IEEE, (2012)A WCDMA/WLAN digital polar transmitter with AM replica feedback linearization in 65nm CMOS., and . ESSCIRC, page 57-60. IEEE, (2012)A 0.9-5.8-GHz Software-Defined Receiver RF Front-End With Transformer-Based Current-Gain Boosting and Harmonic Rejection Calibration., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (8): 2371-2382 (2017)A 23-mW 60-GHz Differential Sub-Sampling PLL with an NMOS-Only Differential-Inductively-Tuned VCO., and . A-SSCC, page 279-282. IEEE, (2019)2.4 A 2.4V 23.9dBm 35.7%-PAE -32.1dBc-ACLR LTE-20MHz envelope-shaping-and-tracking system with a multiloop-controlled AC-coupling supply modulator and a mode-switching PA., , , , , and . ISSCC, page 38-39. IEEE, (2017)A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (3): 642-652 (2017)Analysis and Design of Wide-Band Millimeter-Wave Transformer-Based VCO and ILFDs., and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (9): 1416-1425 (2016)Analysis and Design of a 0.6 V 2.2 mW 58.5-to-72.9 GHz Divide-by-4 Injection-Locked Frequency Divider With Harmonic Boosting., and . IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (8): 2001-2008 (2013)